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operation of Von Neumann architecture

27 mayo, 2021

Von Neumann He described the foundation of every electronic computer with stored programs. It described, unlike what happened previously, how a computer could work with its units permanently connected and its operation was coordinated from the control unit (for practical purposes it is the CPU). Although the technology has come a long way and increased the complexity of the initial architecture, the basis for its operation is the same and will likely remain so for a long time. The article is accompanied by a graphical representation of operation.

Before going into the details of the units we have to know the following:

  • Records: is the place where the data that is in motion is temporarily stored for processing. In the representation of the image at the beginning you can see what the records are.
  • Buses: they are the unions between the different units, the memory and the peripherals.

Central Processing Unit (CPU)

It is the unit in charge of controlling and governing the entire system that comprises a computer. The CPU consists of an integrated circuit made up of millions of transistors, which is designed to be able to process data and control the machine. As you know, it is a key factor for the power of the computer. The CPU has two units inside: the control unit and the arithmetic-logical unit.

Control unit

Control unit

The control unit is in charge of reading the instructions (of the programs stored in memory) and is in charge of sending the orders to the processor components to execute the instructions.

The process begins when an instruction arrives at the instruction record (It comes as a string of bits with different parts, referring to the instruction itself and the data to be used). Later the decoder it interprets the instruction to be carried out and how the processor components must act to carry it out. This action is performed using the sequencer that sends micro-orders marked by the clock (which generates pulses constantly, its speed is usually expressed in gigahertz or GHz, for current processors).

Arithmetic Logic Unit (ALU)

Logical arithmetic unit

The logical arithmetic unit It is in charge of carrying out all the arithmetic (addition, multiplication …) and logic (comparisons) operations.

This unit can have different designs, the one in the upper image shows the most basic design (where the accumulator is used again in the operation), at present it is normal that the accumulator does not mix with the input registers.

The operation with the design that we are analyzing (the basic one) begins when a data (a string of bits representing a number) reaches the input register, then the operational circuit (In the image it is represented as “ALU” and colored blue) and is processed together with the content of the accumulator and later it is deposited again in the accumulator. Repeating this action generates the calculations. This process is clearly seen in the representation below.

Principal memory

Memory table

The principal memory In the initial architecture it was directly RAM, but this has evolved and caches have been added and algorithms implemented that predict which data we are going to use most frequently.

The RAM memory is quite simple, compared to the CPU, it could be said that it is a table, which contains the address (or place) where certain data is and the content of the data itself. The memory has a address register (RDM) and a memory swap register (RIM or data log). In the address register the address in which a data will be stored or read is stored, and in the memory swap register that data read or to be stored is stored.

When we talk about memory addresses, many of you will sound like C “pointers”, and this is why it is essential to know the Von Neumann architecture before learning to program in certain languages ​​that act at a lower level.

The control unit contains the program counter register, which contains the memory address of the next instruction, which is incremented after performing an instruction and thus goes through the memory and executes the program.

Buses

All these elements communicate with each other through buses, either to handle the actions to be carried out by the machine or to move data. There are three types of buses.

The data bus Perite the exchange of data (either instructions or data) with the rest of the elements of the architecture. That is to say, through the data bus the control unit receives the instructions and the ALU the data from the memory, as well as sending them by this means.

The instruction bus transmits the memory addresses to be used from the CPU, in order to select the data to be used.

The control bus It is the one that transports the orders generated by the CPU to control the various processes of the machine.

Architecture performance

To see how the architecture works I have created a documented representation of the process.

This architecture design, as I have already mentioned, is the basic one (with accumulator as input register) and the width of the data is 8 bits. The instructions are made up of two 4-bit blocks, the first for instructions and the last for the memory address.

Whenever a number is used in an instruction it is destined to the memory address, where the actual number to be used for an operation is used.

Currently 32, 64 or 128 bit widths are used in computers, and it does not have to follow the same pattern. Next I am going to expose several patterns that can be given, in order to complete the representation a little more, which is very simple as it only has 8 bits.

# Tal como aparece en la representación
  
        0111 0011
  
        +------+------+
        | 0111 | 0011 |
        +------+------+
        |      | Dirección de memoria a usar
        | Instrucción
  
  
# Ejemplo con 16 bits y varios registros
    
        0011 1010 1001 0101
  
        +------+--------+--------+
        | 0011 | 101010 | 010101 |
        +------+--------+--------+
        |      |        | Registro de entrada 2
        |      | Registro de entrada 1
        | Instrucción
  
  
# Ejemplo con 32 bits, varios registros y lugar a almacenar resultado
  
        0011 1010 1001 0101 0011 0110 1110 0101
  
        +----------+----------+----------+----------+
        | 00111010 | 10010101 | 00110110 | 11100101 |
        +----------+----------+----------+----------+
        |          |          |          | Dirección de destino del resultado
        |          |          | Registro de entrada 2
        |          | Registro de entrada 1
        | Instrucción

Note: Each processor is different, so perhaps some of the examples are true or similar to one in use, but it doesn’t have to.

As I said, here we have the documented simulation of how the Von Neumann architecture works, which you can see at a larger size as well. (It is more convenient to go to the next step by pressing enter).

Resume

Although it is a bit difficult to understand at first, it is essential to know the basics of computing when one is dedicated to programming, and thus come to understand how our programs affect the interaction of the system. Although currently many languages ​​abstract us from all this, but that would already be entering software architecture.